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v er 2 . 8 12/01/12 1 es519 8 0 (60 00counts) dmm analog front end with inrush features ? 6000 counts dual - slope s adc (2 - 5 cnvs/s.) ? input signal full scale: 630mv (m a x. 6300 c ount ) ? built - in 600 counts fast speed (x10) f adc ? fast adc conversion rate: 2 0 - 50 times/s ? 1 00l l qfp package ? 3v dc regulated power supply ? s upport digital multi - met er function *voltage measurement (ac/dc) *current measurement (ac/dc) * dual mode for f requency with v oltage or c urrent *resistan ce measureme n t (600.0 ? C 60.00m ? ) *capacitance measurement (6.000nf C 60.00mf) ( taiwan patent no.: 323347, 453443) *diode or continuity mode measurement *frequency counter with duty cycle display: 6 0 .00hz C 6 0 .00mhz 5 % C 9 5 % ? adp mode (ac or dc mode is available) ? 3db bw s electable for l ow pass filter at ac mode ( taiwan patent no.: 362409) ( china patent no.: 1363073) ? band - gap reference voltage output ? 3 - wire serial bus for mpu i/o port ? mpu i/o power level selectable by external pins ? on - chip buzzer driver and frequency select able by mpu command ? high - crest - factor signal detection (taiwan patent no.: 234661) ? multi - level b attery voltage detection ? support sleep mode by external chip select pin ? support inrush current measurement mode application clamp - on meter description ES51980 is a n analog frond end chip of dmm built - in 6000 (sadc) /600 (fadc) counts dual adc s. the sadc is operated at slower speed for higher resolution. the fadc is operated at higher speed for lower resolution. ES51980 provide s volt age & current (ac/dc) measuremen t, resistance measurement, capacitance measurement, diode/continuity measurement, f requency measurement, duty cycle measurement and inrush current measurement mode . an analog switches network is built - in for insulation resistance application. t he ES51980 a lso support s multi - level battery detection, low - pass - filter feature for ac mode and dual mode measurement for v+f & a+f. a 3 - wire serial bus for mpu i/o port will be used easily for firmware design. flexible function design is supported for different kinds of dmm or clamp - on meter application. .
v er. 2 . 8 12/01/12 2 es519 8 0(60 00counts) dmm analog front end with inrush pin assignment 1 2 3 4 5 6 a b c d 6 5 4 3 2 1 d c b a bufh 1 caz h 2 nc 3 cl+ 4 cl- 5 ci l 6 caz l 7 bufl 8 raz 9 o hmc3 10 o hmc2 11 o hmc1 12 v rh 13 v a+ 14 v a- 15 extsrc 16 o r1 19 v r5 20 v r4 21 v r3 22 v r2 23 o vsg 24 v r1 25 ivsh 37 ivsl 38 a dp 39 acvl 43 acvh 44 a di 45 a do 46 test5 47 sgn d 36 ca- 48 ca+ 49 r9k 55 r1k 56 o vx 26 o vh 27 lpc1 57 lpc2 58 lpc3 59 lpfout 60 nc 61 nc 62 nc 63 nc 54 nc 53 stbeep 64 freq 65 nc 66 nc 67 nc 68 nc 69 nc 70 nc 71 nc 72 nc 73 nc 74 nc 75 nc 76 nc 77 cih 1 00 o sc2 78 o sc1 79 cs 80 i o_ c t rl 81 bzout 82 nc 83 data_new 84 s cl k 85 sda t a 86 c+ 87 c- 88 l ba t 89 v- 90 v- 91 u pv cc 92 v+ 93 v+ 94 dgnd 95 agnd 96 agnd 97 ch+ 98 ch- 99 ovh1 28 opin- 40 opin+ 41 opout 42 o hm c4 50 csh- 52 csh+ 51 i rvh 1 17 i rvh 0 18 irvl 35 irvg 34 i r r5 29 i r r4 30 i r r3 31 i r r2 32 i r r1 33 ES51980
v er. 2 . 8 12/01/12 3 es519 8 0(60 00counts) dmm analog front end with inrush pin description pin no symbol type description 1 bufh o high - speed buffer output pin. connect to integral resistor. 2 cazh o high - speed auto - zero capacitor connection. 3 nc - not connected 4 cl+ io positive connection for reference capacitor of high - resolution a/d. 5 cl - io negative connection for reference capacitor of high - resolution a/d. 6 cil o high - resolution integrator output. connect to integral capacitor. 7 cazl o high - resoluti on auto - zero capacitor connection. 8 bufl o high - resolution buffer output pin. connect to integral resistor 9 raz o buffer output pin in az and zi phase. 10 ohmc3 o filter capacitor connection for resistance mode. 11 ohmc2 o filter capacitor connection for resistance mode. 12 ohmc1 o filter capacitor connection for resistance mode. 13 vrh o output of band - gap voltage reference. typically C 1.23v 14 va + i de - integrating voltage positive input. the input should be higher than va - . 15 va - i de - integrati ng voltage negative input. the input should be lower than va + . 16 extsrc i external source input available for res/diode/adp mode 17 irvh1 o high voltage measurement range1 for insulation r mode 18 irvh0 o high voltage measurement range0 for insulation r mode 19 or1 o reference resistor connection for 60 0.0 range 20 vr5 o voltage measurement 10000 attenuator(1000v) 21 vr4 o voltage measurement 1000 attenuator( 60 0.0v) 22 vr3 o voltage measurement 100 attenuator( 60 .00v) 23 vr2 o voltage measuremen t 10 attenuator( 6.0 00v) 24 ovsg o sense low voltage for resistance /voltage measurement 25 vr1 i measurement input. connect to a precise 10m res istor. 26 ovx i sense input for resistance /capacitance measurement 27 ovh o output connection for resistanc e measurement 28 ovh 1 o output connection 1 for resistance measurement (optional) 29 irr5 i test mode used (optional) 30 irr4 i current shunt resistor4 connection for insulation r mode 31 irr3 i current shunt resistor3 connection for insulation r mode 32 irr2 i current shunt resistor2 connection for insulation r mode 33 irr1 i current shunt resistor1 connection for insulation r mode 34 irvg i voltage measurement terminal low - side of shunt resistor 35 irv l i voltage measurement terminal high - side of s hunt resistor 36 sgnd g signal ground. 37 ivsh i current measurement input for 6 0 00 a, 6 0 0ma and 60 a modes . 38 ivsl i current measurement input for 6 0 0 a, 6 0 ma. 39 adp i measurement input in adp mode. 40 opin - i independent operational amplifier negat ive input 41 opin + i independent operational amplifier positive input 42 opout o independent operational amplifier output 43 acvl o dc signal low input in acv/aca mode. connect to negative output of external ac to dc converter. 44 acvh o dc signal high input in acv/aca mode. connect to positive output of external ac to dc converter. 45 adi i negative input of internal ac - to - dc opa mp . 46 ado o output of internal ac - to - dc opa mp . 47 test5 o buffer output of ovsg 48 ca - io negative auto - zero capacito r connection for capacitor measurement 49 ca+ io positive auto - zero capacitor connection for capacitor measurement
v er. 2 . 8 12/01/12 4 es519 8 0(60 00counts) dmm analog front end with inrush 50 ohmc 4 o filter capacitor connection for resistance mode. 51 csh+ i/o capacitor connection for inrush mode 52 csh - i/o capacitor connec tion for inrush mode 53 nc - not connected 54 nc - not connected 55 r9k o connect to a precise 9k resister for capacitor measurement. 56 r1k o connect to a precise 1k resister for capacitor measurement. 57 lpc1 o capacitor c1 connection for internal low - pass filter 58 lpc2 o capacitor c2 connection for internal low - pass filter 59 lpc3 o capacitor c3 connection for internal low - pass filter 60 lp f out o capacitor c1 connection for internal low - pass filter 61 nc - not connected 62 nc - not connected 63 nc - not connected 64 stbeep o fast low - impedance sensed output for cont./diode mode build - in a internal comparator for ovx pin. 65 freq i frequency counter input, offset v - /2 internally by the chip. 66 - 77 nc - not connected 78 osc2 o crystal oscillator output connection 79 osc1 i crystal oscillator input connection 80 cs i set to high to enable ES51980 . set to low to enter sleep mode 81 io_ctrl i mpu i/o level low setting. connect to dgnd or v - . 82 bzout i buzzer frequency output . normal low state. 83 test - test mode used. not connected 84 data_new o new adc data ready 85 sclk i serial clock input 86 s d ata i o serial data input/output 87 c+ o positive capacitor connection for on - chip dc - dc converter. 88 c - o negative capacitor connection for on - chip dc - dc converter. 89 l b at i low battery configuration input. 90 v - p ne gative supply voltage. 91 v - p negative supply voltage. 92 upvcc p switch 5 for function selection. 93 v+ o output of on - chip dc - dc converter. 94 v+ o output of on - chip dc - dc converter. 95 dgnd g digital ground. 96 agnd g analog ground. 97 agnd g analog ground. 98 ch+ io positive connection for reference capacitor of high - speed a/d. 99 ch - io negative connection for reference capacitor of high - speed a/d. 100 cih o high - speed integrator output. connect to integral capacitor.
v er. 2 . 8 12/01/12 5 es519 8 0(60 00counts) dmm analog front end with inrush absolute maximum ra tings characteristic rating supply voltage (v - to agnd) - 4v analog input voltage & extsrc pin v - - 0.6 to v+ +0.6 v+ v+ (agnd/dgnd+0.5v) agnd/dgnd agnd/dgnd (v - - 0.5v) digital input (io_ctrl=v - ) v - - 0.6 to upvcc +0.6 power dissipation. flat packag e 500mw operating temperature 0 to 70 storage temperature - 5 5 to 125 electrical characteristics ta=25 , v - = - 3.0v parameter symbol test condition min. typ. max units power supply v - - 2.8 - 3. 0 - 3.2 v operating supply current in dcv mode i dd normal operation 2. 8 3.2 ma i ss in sleep mode 1 3 a sadc 2 voltage roll - over error 10m input resistor 0.1 %f.s 1 f adc 3 voltage roll - over error 10m input resistor 0. 5 %f.s 1 sadc 2 v oltage nonli nearity nlv 1 best case straight line 0.1 %f.s 1 fadc 3 v oltage nonlinearity nlv 2 best case straight line 1.0 %f.s 1 v oltage f ull scale range of sadc 2 va + - va - = 200mv 600 630 mv v o ltage f ull scale range of fadc 3 va + - va - = 200mv 600 mv i nput leakage for vr1 input - 10 1 10 p a zero input reading 10m input resistor - 000 000 +000 c ount band - gap r eference voltage v rh 100k resistor between vrh and agnd - 1. 30 - 1.2 2 - 1.1 4 v o pen circuit voltage for 6 0 0 range measurement v - v o pen circuit voltage for other measurement v rh v intern al pull - high to 0v current between v - pin and cs 1.2 a ac frequency response at 6. 0 00v range 1% 40 - 400 hz 5% 400 - 2000 op unity gain bandwidth gb c l =10pf r l =10m : 200 khz op slew rate at unity gain sr 3.5 v/us op input offs et voltage v io 0. 1 mv op input bias current i b 10 pa op input common mode voltage range v icr + 2 v 3db frequency for lpf 4 active f 3db 3db=full (adp) 100 k hz 3db=10k (adp) 10 k hz 3db=1k (adp) 1 k hz
v er. 2 . 8 12/01/12 6 es519 8 0(60 00counts) dmm analog front end with inrush multi - level low batte ry detector v t1 l b at v s . v - 2.15 v v t 2 2.03 v v t3 1.83 v stbeep comparator in diode mode ovx to sgnd +9 mv stbeep comparator in cont. mode ovx to sgnd - 7 mv hcf detection voltage vr2 - vr5 1100 mv inrush measurement inte gration time 100 ms frequency input sensitivity ( freq ) fin s quare wave with d uty cycle 40 - 60% 5 00 mvp frequency input sensitivity ( freq ) fin s ine wave 400 mvrms reference voltage temperature coefficient tc rf 100k resister between v rh 0 ES51980 built - in 3 rd order low pass filter available for ac mod e 5. gain calibration is necessary for higher accuracy
v er. 2 . 8 12/01/12 7 es519 8 0(60 00counts) dmm analog front end with inrush ac electrical characteristics parameter symbol min. typ. max. unit sclk clock frequency f sclk - - 100 khz sclk clock tim e l t low 4.7 - - us slck clock time h t high 4.0 - - sdata output delay time t aa 0.1 - 3.5 sdata output hold time t dh 100 - - ns start condition setup time t su.sta 4.7 - - us start condition hold time t hd.sta 4.0 - - data input setup time t su.d at 200 - - ns data input hold time t hd.dat 0 - - stop condition setup time t su.sto 4.7 - - us sclk/sdata rising time t r - - 1.0 sclk/sdata falling time t f - - 0.3 bus release time t buf 4.7 - - eoc setup time in read mode t su.eoc 0 ns eoc hold time in read mode t hd.eoc 0 - - ns mpu i/o timing diagram sclk s d ata i n sdata out
v er. 2 . 8 12/01/12 8 es519 8 0(60 00counts) dmm analog front end with inrush function description 1. mpu serial i/o function overview 1.1 introduction ES51980 configures a 3 - wire serial i/o interface to external microprocessor unit (mpu). the sdata pin is bi - dire ctional and sclk & data_new are unilateral. the sdata pin is configured by open - drain circuit design. the data_new is used to check the data buffer of adc ready or not. when the adc conversion cycle is finished, the data_new pin will be pulled high until m pu send a valid read command to ES51980 . after the first id byte is confirm ed , the data_new will be driven to low until the next adc conversion finished again. the data communication protocol is shown below. t h e write protocol is configured by an id byte with four command bytes. t h e read protocol is configured by an id byte with ten data bytes. write command : id byte, write c ontrol byte1, write c ontrol byte2, write c ontrol byte3, write c ontrol byte4 read command : id byte, read d ata byte1, read d ata byt e2 ~ read d ata byte9, read d ata byte10 1 1 0 0 0 1 write a c k a c k a c k a c k start bit stop bit 0 b u z a c k 1 1 0 0 0 1 write a c k a c k a c k a c k start bit stop bit 0 b u z a c k a c k 1 1 0 0 0 1 a c k start bit stop bit a c k a c k a c k a c k n a k read 1 b u z 1 1 0 0 0 1 a c k start bit stop bit a c k a c k a c k a c k n a k read 1 b u z sclk sdata data_new adc data ready next adc data ready 1 1 0 0 1 0 id code confirmed 1 read command start bit stop bit id code sclk sdata data_new adc data ready next adc data ready 1 1 0 0 1 0 id code confirmed 1 read command start bit stop bit id code
v er. 2 . 8 12/01/12 9 es519 8 0(60 00counts) dmm analog front end with inrush the id byte of ES51980 is header of 110010 followed by a buzzer on/off control bit and r/w bit. the start/stop bit definition is shown on the diagram below. 1.2 read/write command description the write command includes one id byte with four command bytes. if the valid write id code is received by ES51980 at any time , the write command operation will be enabled. the next table shows the content of write command. byte b it7 b it6 b it5 b it4 b it3 b it2 b it1 b it0 id 1 1 0 0 1 0 buz r/w=0 w1 shbp f 3 f 2 f 1 f 0 q 2 q 1 q 0 w2 b0 b1 b2 c 0 c 1 fq 2 fq1 fq 0 w3 ac 0 0 ext f s 60 lpf 1 lpf 0 fres w4 0 0 irq ina /irv irr op 0 op1 ext_adp auxiliary low - resistance detection control bit for continuity and diode modes : shbp measurement function control bit: f 3 /f 2/f 1/f 0 range control bit for v/a/r/c modes : q 2 /q1/q 0 range control bit for freq mode : fq 2 /fq1/fq 0 buzzer frequency selection: b 2 /b1/b 0 buzzer driver on/off control bit: buz adc conversion rate control bit: c 1/c 0 ac mode control enable bit: ac 3db bw for low - pass - filter selection: lpf 1 /lpf 0 external source for diode mode control bit: ext inrush mode control bit: ina op configuration control bit: op 1/op 0 frequency mode input resistance control bit: fres adp mode c ontrol bit: ext_adp adp dc mode full scale control bit: fs60 insulation mode control bit: irq/irv/irr
v er. 2 . 8 12/01/12 10 es519 8 0(60 00counts) dmm analog front end with inrush the read command includes one id byte with ten data bytes. when data_new is ready 1 , mpu could send the read data command to get the result of adc conver sion (d0/d1/d2/d3) 2 or status flag from ES51980. the next table shows the content of read command. byte b it7 b it6 b it5 b it4 b it3 b it2 b it1 b it0 id 1 1 0 0 1 0 buz r/w=1 r1 asign bsign x x bts0 bts1 sta0 alarm r2 hf lf l duty sta1 f_ fin d0:0 d0:1 d0:2 r3 d0:3 d0:4 d0:5 d0:6 d0:7 d0:8 d0:9 d0:10 r4 d0:11 d0:12 d0:13 d0:14 d0:15 d0:16 d0:17 d0:18 r5 d1:0 d1:1 d1:2 d1:3 d1:4 d1:5 d1:6 d1:7 r6 d1:8 d1:9 d2:0 d2:1 d2:2 d2:3 d2:4 d2:5 r7 d2:6 d2:7 d2:8 d2:9 d2:10 d2:11 d2:12 d2:13 r8 d2:14 d2:15 d2:16 d2 :17 d2:18 d3:0 d3:1 d3:2 r9 d3:3 d3:4 d3:5 d3:6 d3:7 d3:8 d3:9 d3:10 r10 d3:11 d3:12 d3:13 d3:14 d3:15 d3:16 d3:17 d3:18 1 note: data_new will be active with d1 data updated when one fast adc (fadc) conversion finished. if mcu access slow adc output onl y, ten fadc conversion cycle delay is necessary. data_new for frequency or capacitance mode will be active when d0 or d3 data ready. 2 note: d0/d1/d2/d3 all are binary code format. d0 is sadc output and d1 is fadc output the adc data output for measuremen t mode: f3/f2/f1/f0 f 3 f 2 f 1 f 0 measurement mode read data bytes 0 0 0 0 v mode d0(0:18), d1(0:9) 0 0 0 1 ac v + hz mode d0(0:18), d1(0:9), d3(0:18) 0 0 1 0 a mode d0(0:18), d1(0:9) 0 0 1 1 ac a + hz mode d0(0:18), d1(0:9), d3(0:18) 0 1 0 0 res istance m ode d0(0:18), d1(0:9) 0 1 0 1 cont inuity mode d0(0:18), d1(0:9) 0 1 1 0 diode mode d0(0:18), d1(0:9) 0 1 1 1 f + duty mode d0(0:18), d2(0:18), d3(0:18) 1 0 0 0 cap acitance mode d0(0:18) 1 0 0 1 adp mode d0(0:18), d1(0:9) 1 0 1 0 adp + hz mode d0(0:18 ), d1(0:9), d3(0:18) 1 1 1 1 insulation mode d0(0:18)
v er. 2 . 8 12/01/12 11 es519 8 0(60 00counts) dmm analog front end with inrush buzzer frequency selection: b2/b1/b0 b2 b1 b0 buzzer frequency 0 0 0 1.00khz 0 0 1 1.33khz 0 1 0 2.00khz 0 1 1 2.22khz 1 0 0 2.67khz 1 0 1 3.08khz 1 1 0 3.33khz 1 1 1 4.00khz set b2 - b0 properly to get the target frequency. use buz control bit to enable/disable the buzout (pin82) driver output. if mpu control buz only, it is available to set id byte with ending of stop bit. adc conversion rate selection: c1/c0 c1 c0 sadc conver sion time (high resolution adc) fadc conversion time (high speed adc) sadc line noise rejection 0 0 500ms 50ms 50/60hz 0 1 300ms 30ms 50hz 1 0 250ms 25ms 60hz 1 1 200ms 20ms 50hz set c1 - c0 to change the target conversion rate for sadc & fadc simultan eously. a c k 1 1 0 1 0 0 0 start bit stop bit r /w buzzer off a c k 1 1 0 1 0 0 0 start bit stop bit r /w buzzer off 1 1 1 1 0 0 0 start bit stop bit r /w buzzer on 1 1 1 1 0 0 0 start bit stop bit r /w buzzer on
v er. 2 . 8 12/01/12 12 es519 8 0(60 00counts) dmm analog front end with inrush status flags for measurement mode: = function available measurement mode asign bsign bts0 bts1 alarm v mode ac v + hz mode a mode ac a + hz mode res. mode cont. mode diode mode f + duty mode cap. mode adp mode adp + hz mode insulation mode measurement mode hf lf l duty sta 0 sta 1 f_ fin v mode v + hz mode a mode a + hz mode res. mode cont. mode diode mode f + duty mode cap. mode adp mode adp + hz mode insulation mode description of status flags: asign: sign bit of sadc output ( - 1 * d0 if asign=1 ) bsign: sign bit of fadc output ( - 1 * d1 if bsign=1 ) bts0/bts1: multi - level battery voltage indication alarm: large capacitor in dication /high crest factor signal detection in acv mode /inrush mode waiting triggered hf: higher frequency indication for hz mode lf: lower frequen cy indication for hz mode ld uty: low duty indication for hz + duty mode sta0/sta1: divider indication for hz mode sta0: status flag for capacitor discharging mode sta1: status flag for insulation r mode f_fin : measurement cycle finished for hz mode / inrus h integration cycle finished
v er. 2 . 8 12/01/12 13 es519 8 0(60 00counts) dmm analog front end with inrush 1.3 power & i/o level selection t he ES51980 provide a flexible i/o level setting for different mpu system configuration. the up_vcc should be connected to the same potential of external vcc of mcu. the up_vcc is allowed to be set between dgnd ~ v+. the io_ctrl pin selects the vss level of mcu. if io_ctrl is set to dgnd, the vss level of mcu is the same as dgnd. if io_ctrl is set to v - , the vss level of mcu is the same as v - .
v er. 2 . 8 12/01/12 14 es519 8 0(60 00counts) dmm analog front end with inrush 2. operating modes 2.1. voltage measurement mpu se nd write command to select the voltage measurement function. t he hz mode measurement is available to be enabled with the acv function (set ac bit to 1) simultaneously. the measured signal is applied to vr1 terminal (pin25) through 10m ? . see the next table of function command: f 3 f 2 f 1 f 0 ac measurement mode read data bytes 0 0 0 0 0 dc v mode d0(0:18), d1(0:9) 0 0 0 0 1 acv mode d0(0:18), d1(0:9) 0 0 0 1 1 ac v + hz mode d0(0:18), d1(0:9), d3(0:18) note 1 : d0/d1/ d2/ d3 all are binary format. asign/bsign ar e the sign bit of d0/d1, respectively. range control for voltage mode (acv/dcv) q 2 q1 q 0 full scale range divider ratio resister connection 0 0 0 6 0 0.0mv 1 vr1 (10m ? ) 0 0 1 6. 0 00v 1/10 vr2 (1.111m ? ) 0 1 0 6 0 .00v 1/100 vr3 (101k ? ) 0 1 1 6 0 0.0v 1/1000 vr4 (10.01k ? ) 1 0 0 1000v 1/10000 vr5 (1k ? ) frequency r ange control for acv+hz mode fq 2 fq1 fq 0 full scale range 0 0 0 60.00hz 0 0 1 600.0hz 0 1 0 6.000khz 0 1 1 60.00khz note: see frequency mode (section 2.8) also a larm bit at voltage mode is used for high crest factor (hcf) signal detection . if mpu check the alarm status flag active when data and range are stable, it should consider the making the existing range up to avoid the signal clamping saturation caused by hcf signal. there is higher peak voltage with lower rms value for hcf signal . so if the range is up according to the alarm bit, mcu should set the lower under - limit counts temporarily to avoid the ranging unstable for this case.
v er. 2 . 8 12/01/12 15 es519 8 0(60 00counts) dmm analog front end with inrush 2.2 current measurement mpu send write command to select the current measurement function. t h e hz mode measurement is available to be enabled with the aca function (set ac bit to 1) simultaneously. the measured signal is ap plied to ivsl/ivsh terminals (pin37- 38). see the next table of function command: f 3 f 2 f 1 f 0 ac measurement mode read data bytes 0 0 1 0 0 dca mode d0(0:18), d1(0:9) 0 0 1 0 1 aca mode d0(0:18), d1(0:9) 0 0 1 1 1 aca + hz mode d0(0:18), d1(0:9), d3(0:1 8) note 1 : d0/d1/d3 all are binary format. asign/bsign are the sign bit of d0/d1, respectively. range control for current mode (aca/dca) q2 q1 q0 full scale range input terminal 0 0 0 300mv ? 6000counts ivsl 0 0 1 300mv ? 6000counts ivsh current measu rement mode configuration example: (max. voltage drop 300mv) 1 a 1 com ua / ma 1 0.005 0.495 49. 5 - 2 6 + 3 4 7 1 5 tl061 100k 1 . 5k v + v - v - 90k 10k v - v + ivsh ivsl zero of fset 100k 100k fuse fuse 600.0 / 6000ua 60.00 / 600.0ma 6a / 20a 0.1uf 0.1uf (max voltage drop = ~ 1v) 100k 100k 450 45 4.5 0.45 0.005 ma ma ua ua ua ma ivsl ivsh agnd a sgnd 0.045 2 0a 6a
v er. 2 . 8 12/01/12 16 es519 8 0(60 00counts) dmm analog front end with inrush frequency range control for aca+hz mode fq2 fq1 fq0 full scale range 0 0 0 60.00hz 0 0 1 600.0hz 0 1 0 6.000khz 0 1 1 60.00khz note: see frequency mode (section 2.8) also . 2.3 low pass filter (lpf) mode for aca/acv mode a 3 rd order low pass filter with is built in ES51980 . t h e 3db bandwidth of the low pass filter could be selectable by mpu . the lpf mode is active when t he lpf control bit is set to be active. the lpf mode is allowed to be enabled in f + duty mode to reject high - frequency noise for sine wave input, but the 3db will be fixed at 10khz only. lp f 1 lp f 0 low pass filter effect 0 0 disable 0 1 3db = 1khz 1 0 3db = 10khz 1 1 3db > 100khz 2.4 resistance measurement mpu send write command to select the resistance measurement function. f 3 f 2 f 1 f 0 measurement mode read data bytes 0 1 0 0 res istance mode d0(0:18), d1(0:9) note 1 : d0/d1 both are binary format. asign /bsign bits are ignored . range control for resistance mode q2 q1 q0 full scale range relative resistor equivalent value 0 0 0 6 0 0.0 or1 100 0 0 1 6. 0 00k vr5 1k 0 1 0 6 0 .00k vr4 || vr1 10k 0 1 1 6 0 0.0k vr 3 || vr1 100k 1 0 0 6. 0 00m vr2 || vr1 1m 1 0 1 6 0. 00m vr1 10m
v er. 2 . 8 12/01/12 17 es519 8 0(60 00counts) dmm analog front end with inrush 2.5 capacitance measurement mpu send write command to select the capacitance measurement function. f 3 f 2 f 1 f 0 measurement mode read data bytes 1 0 0 0 capacitance mode d0(0:18) note 1 : d0 is binary format. asign bit is ignored. range control for capacitance mode q2 q1 q0 full scale range relative resistor measurement period 0 0 0 6. 0 00nf - 0. 5 sec 0 0 1 6 0 .00nf ovx pin vr 0. 5 sec 0 1 0 6 0 0.0nf - 1.25 sec 0 1 1 6. 0 00uf r9k / r1k 0. 4 sec max. 1 0 0 6 0 .00uf r9k / r1k 0. 5 sec max. 1 0 1 6 0 0.0uf r9k / r1k 1. 0 sec max. 1 1 0 6. 0 00mf r9k / r1k 1. 35 sec max. 1 1 1 6 0 .00mf r9k / r1k 6 . 75 sec max. ? a la rm bit at capacitance mode is used for increasing the ranging speed. if mpu check the alarm=1 at lower range, it could set the next range to 6.000uf directly and the adc output should be ignored. ? sta0 status bit is used for detection of dut capacitor volt age. if sta0=1, the internal capacitor discharging mode is active and the capacitance measurement is inhibited. it is recommended to discharge the dut capacitor externally. 2.6 continuity check measurement mpu send write command to select the continuity mea surement function. f 3 f 2 f 1 f 0 measurement mode read data bytes 0 1 0 1 continuity mode d0(0:18), d1(0:9) note 1 : d0/d1 both are binary format. asign/bsign bits both are ignored. continuity mode shares the same configuration with 6 0 0.0 resistance measur ement circuit and support the low - resistance d ete ction . i f the stbeep output (pin64) is low, it means the low - resistance status is detected (it means the ovx terminal voltage less than - 7mv) . it could be faster than the fadc result , s o mpu could monitor th e stbeep output and fadc (d1) data output make the high speed detection for short circuit detection . set shbp =1 to enable the built - in buzzer driving automatically when stbeep is active.
v er. 2 . 8 12/01/12 18 es519 8 0(60 00counts) dmm analog front end with inrush 2.7 diode measurement mpu send write command to select the diode measur ement function. f 3 f 2 f 1 f 0 measurement mode read data bytes 0 1 1 0 diode mode d0(0:18), d1(0:9) note 1 : d0/d1 both are binary format. asign/bsign are the sign bit of d0/d1, respectively . diode measurement mode shares the same configuration with 6. 000v voltage measurement circuit and support the low - resistance d ete ction . if the stbeep output (pin64) is low, it means the low - resistance status is detected (it means the ovx terminal voltage less than 9mv) . it could be faster than the fadc result, so mpu co uld monitor the stbeep output and fadc (d1) data output make the high speed detection for short circuit detection . set shbp =1 to enable the built - in buzzer driving automatically when stbeep is active. the default source voltage at diode mode is the same as v+ potential. mpu could set the control bit ext =1 to change the source voltage to external source. the external voltage source (positive or negative) input applied from extsrc (pin16). the available external source range should be from v+ to v - .
v er. 2 . 8 12/01/12 19 es519 8 0(60 00counts) dmm analog front end with inrush 2.8 frequ ency /duty cycle mode measurement t h e default typical input impedance of frequency with dut y cycle mode is 1m ? . the mpu could set control bit fres =1 to change the input impedance down to 100k ? . the mpu send write command to select the frequency/duty cycle measurement function. f 3 f 2 f 1 f 0 measurement mode read data bytes 0 1 1 1 hz + duty mode d0(0:18), d 2 (0: 18), d3(0:18) note 1 : d0/d 2/d3 all are binary format. asign bit is ignored . note2: set lpf1 = 1 to enable the smooth function for sine wave input au tomatically range control for frequency mode fq2 fq1 fq0 full scale 0 0 0 6 0 .00hz 0 0 1 6 0 0.0hz 0 1 0 6. 0 00khz 0 1 1 6 0 .00khz 1 0 0 6 0 0.0khz 1 0 1 6. 0 00mhz 1 1 0 6 0 .00mhz available minimum frequency input (depends on adc conversion rate settin g) c1 c0 f min (ac+hz mode) f min (hz+duty mode) 0 0 4.00hz 4.00hz 0 1 6.00hz 1 0 8.00hz 1 1 10.00hz frequency & duty cycle mode comput ed by d0/d2/d3 (if f_fin = 1) flag sta0=1 sta0=0 range sta1=1 sta1=0 60.00hz freq=100000000/d3 freq=400000000/d3 freq=800000000/d3 6 0 0.0hz freq=10000000/d3 freq=40000000/d3 freq=160000000/d3 6. 0 00khz freq=2000000/d3 freq=32000000/d3 freq=256000000/d3 6 0 .00khz freq=200000/d3 freq=25600000/d3 freq=204800000/d3 6 0 0.0khz freq = d0 6. 0 00mhz 6 0 .00mhz status flag lduty=1 lduty=0 duty cycle (<60khz) 10000 - d2*10000/d3 d2*10000/d3
v er. 2 . 8 12/01/12 20 es519 8 0(60 00counts) dmm analog front end with inrush the status flag f_fin indicate the frequency input signal available (> f min ) or not. if the computed result less than f min , the frequency /duty cycle readings should be set to zero. the status flags hf & lf are used for fast judgment of proper range. if frequency input is larger than 7 khz, hf will be active. if frequency input is floating or frequency detected too low , lf will be active automatically. auto range consideration for mpu by using status flags of frequency mode flag f_fin=0 f_fin= 1 f_fin=1 range lf=0 lf=1 * hf =lf =0 hf=1 ** 60.00hz 60 0.0hz 6. 0 00khz data and range is not necessary to be updated set hz/duty=0 change range depends on data computed set range to 60.00khz range set range to 60.00hz range 6 0 .00khz 60 0.0khz 6.0 00mhz 60 .00mhz change range depends on data computed * note: lf=1 @ 60hz range implies the frequency is not available to be measured. t h e hz/duty readings should be set to zero. * *note: when acv+hz / aca+hz / adp+hz mode is selected, the hf status should be ignored . change range depends on data calcu lation result. duty cycle mode range (input sensitivity > 2 vpp @ duty cycle= 5% or 95% ) freq. range duty range 60.00hz 60 0.0hz 5% - 95% 6.0 00khz 10 % - 90% 60 .00khz 20% C 80%
v er. 2 . 8 12/01/12 21 es519 8 0(60 00counts) dmm analog front end with inrush 2.9 a dp mode mpu send write command to select the adp mode measurement function. t h e hz mode measurement is available to be enabled with the adp ac function (set ac bit to 1) simultaneously. the measured signal is applied to adp terminal (pin39). t h e signal full scale is 600mv for dc mode and 600mvrms for ac mode. t he fs60 control bit is used for adp dc mode. w hen fs60 =1, the full scale will be change from 600mv to 60mv. it means the resolution will be improved to 0.01mv, but the adc conversion rate will be reduced to 0.9 /sec . see the next table of function command: f 3 f 2 f 1 f 0 ac measurement mode read data by tes 1 0 0 1 0 adp dc mode d0(0:18), d1(0:9) 1 0 0 1 1 adp ac mode d0(0:18), d1(0:9) 1 0 1 0 1 adp + hz mode d0(0:18), d1(0:9), d3(0:18) note 1 : d0/d1/d3 all are binary format. asign/bsign are the sign bit of d0/d1, respectively. frequency range contro l for adp+hz mode fq2 fq1 fq0 full scale range 0 0 0 60.00hz 0 0 1 600.0hz 0 1 0 6.000khz 0 1 1 60.00khz note: see frequency mode (section 2.8) also if mpu set the control bit ext _adp =1, the voltage on extsrc pin could be switched to adp terminal in ternally. it is helpful for a voltage pulled application of adp mode. adc in+ adc in - sgnd ext_adp adp_n e adn adn sgnd ext_adp adp_n e
v er. 2 . 8 12/01/12 22 es519 8 0(60 00counts) dmm analog front end with inrush 2.10 inrush measurement f 3 f 2 f 1 f 0 ac measurement mode input terminals read data bytes 1 0 0 1 1 adp ac mode adp d0(0:18) 0 0 1 0 1 aca mode ivsh/ivsl d0(0:18) es519 80 pro vides an inrush function for ac current measurement of clamp - on meter to dectect the starting - up current of a motor. only aca/adp(ac) modes support inrush measurement mode. set control bit ina =1 of write command to en ter the inrush function . in itially, the status bit alarm=1 means to wait for signal triggered (> 20mvp typ.) . if the external starting - up signal is applied and detected, es519 80 will execute the inrush measurement. when the inrush measurement is finished , the status bit f_fin=1 to indicate the inrush integration cycle is finished . it means the adc data is ready for access by mcu . to e nter inrush mode cycle again , set control bit ina =1 of write command and repeat the procedures mentioned above. to exist inru sh mode, set ina =0 of write command. for inrush function, an external true rms - to - dc es636 ic is required. the flow chart of inrush function is shown below.
v er. 2 . 8 12/01/12 23 es519 8 0(60 00counts) dmm analog front end with inrush 2.11 insulation resistance measurement mode the ES51980 is built - in analog switches network to support the insulation resistance measurement mode. by implementation of external high voltage source, the insulation resistance could be obtained from sadc output of ES51980 and calculated by microprocessor easily. the insulation mode is separated int o two modes which are insulation v mode and insulation r mode which are described below. insulation v mode configuration f 3 f 2 f 1 f 0 irv ac measurement mode read data bytes 1 1 1 1 1 0 /1 insulation (dc/ac) v mode d0(0:18) note 1 : d0 is binary format. as ign is the sign bit d0. note: the on - resistance of internal analog switches could be omitted. insulation v mode hv off (discharging mode) ptc 10m ? 10.01k ? v a v b irvg v adc 1k ? vr4 vr5 mcu control mcu control 1.11m ? 101k ? vr2 vr3 v dut = v a - v b = k * v adc q1 active in insulation v mode insulation v mode hv off (discharging mode) ptc 10m ? 10.01k ? v a v b irvg v adc 1k ? vr4 vr5 mcu control mcu control 1.11m ? 101k ? vr2 vr3 v dut = v a - v b = k * v adc q1 active in insulation v mode
v er. 2 . 8 12/01/12 24 es519 8 0(60 00counts) dmm analog front end with inrush before measure insulation resistance, it is necessary to measure v dut . if v dut is too high, the resistance measurement should be forbidde n . the insulation v mode is implemented by the same configuration with voltage mode. the k factor of diagram is depended on the voltage range. during insulation v mode, an external fast discharging path should be applied on the hv sourcing part to release the high voltage charge on the dut if it is capacitive load. range control for insulation v mode q2 q1 q0 full scale range 0 1 0 6 0 .00v 0 1 1 6 0 0.0v 1 0 0 1000v note: 600mv C 6v range s are omitted. insulation r mode configuration f 3 f 2 f 1 f 0 irv ir r measurement mode read data bytes 1 1 1 1 0 1 insulation r mode d0(0:18) note: adc full scale is 600mv typically. hv(25v ~ 1000v) ptc 10m ? 5.6k ? adc rx v a 360? 3.6k ? 36k ? 360k ? v b adc irr4 irr3 irr2 irr1 v d1 v d2 v a = v d1 / r a * (10m+ r a ) i rx = v d2 / r b = v b / r b r x = (v a -v b ) / i rx i rx r b mcu control 56k ? r a irvh0 irvh1 mcu control 100k ? mcu control q1 insulation r mode irr5 test mode hv(25v ~ 1000v) ptc 10m ? 5.6k ? adc rx v a 360? 3.6k ? 36k ? 360k ? v b adc irr4 irr3 irr2 irr1 v d1 v d2 v a = v d1 / r a * (10m+ r a ) i rx = v d2 / r b = v b / r b r x = (v a -v b ) / i rx i rx r b mcu control 56k ? r a irvh0 irvh1 mcu control 100k ? mcu control q1 insulation r mode irr5 test mode
v er. 2 . 8 12/01/12 25 es519 8 0(60 00counts) dmm analog front end with inrush during insulation r mode is setting, the sadc of es51966 will convert the dut terminal voltage v a (higher voltage side v d1 ) & v b (lower voltage side v d2 ) sequentially. use ohm s law calculation { r x = (v a - v b )/i rx } to get the target dut insulation resistance easily . the microprocessor gets the adc data by checking status bit sta1 : status indication sta1=1 sta1=0 adc data v d1 v d2 the proper range control (r a / r b selection) depends on the hv source. the r a selection is controlled by irq control bit. the r b is selected by q2/q1/q0 control bits. the next range table is an example of hv sourcing from 25v to 1000v. r a s e t irq=1 ( irvh1 ) s et irq=0 ( irvh0 ) r b hv=25v hv=50v hv=100v hv=250v hv=500v hv=1000v irr1 15k ? ~ 150k ? 30k ? ~ 300k ? 60k ? ~ 600k ? 0.15m ? ~ 1.5 0 m ? 0.30m ? ~ 3.0 0 m ? 0.60m ? ~ 6.00m ? irr2 0.15m ? ~ 1.50m ? 0.30m ? ~ 3.00m ? 0.60m ? ~ 6.00m ? 1.5m ? ~ 15.0m ? 3.0m ? ~ 30.0m ? 6.0 m ? ~ 60 .0 m ? irr3 1.5m ? ~ 15.0m ? 3.0m ? ~ 30.0m ? 6.0m ? ~ 60.0m ? 15m ? ~ 150m ? 30m ? ~ 300m ? 60m ? ~ 600m ? irr4 15m ? ~ 150m ? 30m ? ~ 300m ? 60m ? ~ 600m ? 0.15g ? ~ 1.5 0 g ? 0.30g ? ~ 3 .00g ? 0.60g ? ~ 6.00g ? q2 q1 q0 r b range best resolution* 0 0 1 irr1 1k ? 0 1 0 irr2 0.01m ? 0 1 1 irr3 0.1m ? 1 0 0 irr4 1m ? 1 0 1 test mode (irr5) n/a *note: the best resolution depends on the external high voltage and sadc readings. 2.12 sleep set cs pin (pin 80) to logic low to make the ES51980 enter ing the sleep mode. t h e current consumption will be less than 3 ua typ ically . set cs pin to logic high or kept floating, the ES51980 will return to normal operation.
v er. 2 . 8 12/01/12 26 es519 8 0(60 00counts) dmm analog front end with inrush 2.13 multi - level battery voltage indication the ES51980 is built - in a comparator for batter voltage indication. t he voltage is applied to lbat pin (pin 89) vs. v - terminal. mpu could check the status bit bts 1 /bts 0 and monitor the lbat voltage status. battery voltage bts1 bst0 v lbt > v t1 1 1 v t2 < v lbt < v t1 1 0 v t3 < v lbt < v t2 0 1 v lbt < v t3 0 0 low battery co nfiguration for 9v/1.5v*4/1.5v*3 battery low battery test circuit (a) 360 k 270 k ba tt lbat v - agnd 0.1u 0v 6 v low battery test circuit (b) 470 k 180 k ba tt lbat v - agnd 0.1u 0v 9 v low battery test circuit (c) 360 k 470 k ba tt lbat v - agnd 0.1u 0v 4.5 v
v er. 2 . 8 12/01/12 27 es519 8 0(60 00counts) dmm analog front end with inrush 2.14 independent opamp ES51980 is built- in a n independent opamp with low - drift offset using for general purpose. mpu could control the op1/op0 to change the opamp configuration: op1 op0 op amp configuration 0 0 normal 0 1 op disable 1 0 unity gain buffer 1 1 z ero calibration independent opamp configuration normal operation + - opin+ opin - opout unity gain operation + - opin+ opin - opout + - opin+ opin - opout zero offset calibration independent opamp configuration normal operation + - opin+ opin - opout + - opin+ opin - opout unity gain operation + - opin+ opin - opout + - opin+ opin - opout + - opin+ opin - opout + - opin+ opin - opout zero offset calibration
v er. 2 . 8 12/01/12 28 es519 8 0(60 00counts) dmm analog front end with inrush 3. application circuit 3.1 rms circuit (es636) 1 2 3 4 a b c d 4 3 2 1 d c b a title num b e r revision size a4 date : 11-nov-2011 sh ee t of file: f:\protel file\ka029\ka029.ddb drawn by : r7 100k r6 100k r8 100k c14 470pf +/- 10% c15 100pf +/- 10% c19 3.3nf +/- 10% r12 200 r13 2 . 2k p tc 1 2 jp1 fi n + c20 2.2uf c4 10nf v cc v + v1 - lbat9 c5 470nf sda s cl data_new v ss cs buz o ut stbeep r1 470k c2 22nf c1 22nf c13 100nf c7 220nf r9 0 r5 220k c10 220nf c6 470nf c9 47nf v r1 500 r2 11k r11 56k + c12 4.7uf c11 220nf extsrc v a+ v a- r18 100 r19 1 k r21 101k r22 1.111m r20 10.01k o vsg r23 10m c21 680pf r16 2 . 2k p tc r25 1k close to ic r17 180k o vx r14 2 . 2k p tc r24 1k o vh ovh1 ivsh ivsl a dp acvh r32 9k r26 1k + c22 1uf r9k r1k opin+ q5 q6 q7 q8 q1 q2 q3 q4 opin- opout v r2 50k sw2 a cv rm s mpu v dd v ss u pvcc ( dgnd or +3v) v- or dgnd sda ta sclk data_new cs ver : 9 ES51980 sc hematic circ uit (trms) demo board schematic acvh vin 1 en 2 - vs 3 cav 4 db 5 buf out 6 buf i n 7 i o ut 8 rl 9 common 10 nc 11 nc 12 nc 13 + vs 14 u2 es63 6 + c23 4.7uf + c24 2.2uf v r4 500k r34 10k r33 200 + vs - vs - vs + c25 22uf v r3 500 a di + vs c8 470nf +/- 10% c3 22nf metallized polypropylene film capacitor : c7 metallized polyester capacitor : c1 , c13 , c11 , c29 a di r3 200k + vs 47k v dd bufh 1 caz h 2 nc 3 cl+ 4 cl- 5 ci l 6 caz l 7 bufl 8 raz 9 o hmc3 10 o hmc2 11 o hmc1 12 v rh 13 v a+ 14 v a- 15 extsrc 16 o r1 19 v r5 20 v r4 21 v r3 22 v r2 23 o vsg 24 v r1 25 ivsh 37 ivsl 38 a dp 39 acvl 43 acvh 44 a di 45 a do 46 test5 47 sgn d 36 ca- 48 ca+ 49 r9k 55 r1k 56 o vx 26 o vh 27 lpc1 57 lpc2 58 lpc3 59 lpfout 60 nc 61 nc 62 nc 63 nc 54 nc 53 stbeep 64 freq 65 nc 66 nc 67 nc 68 nc 69 nc 70 nc 71 nc 72 nc 73 nc 74 nc 75 nc 76 nc 77 cih 1 00 o sc2 78 o sc1 79 cs 80 i o_ c t rl 81 bzout 82 nc 83 data_new 84 s cl k 85 sda t a 86 c+ 87 c- 88 l ba t 89 v- 90 v- 91 u pv cc 92 v+ 93 v+ 94 dgnd 95 agnd 96 agnd 97 ch+ 98 ch- 99 ovh1 28 opin- 40 opin+ 41 opout 42 o hm c4 50 csh- 52 csh+ 51 i rvh 1 17 i rvh 0 18 irvl 35 irvg 34 i r r5 29 i r r4 30 i r r3 31 i r r2 32 i r r1 33 u1 ES51980 c29 47nf r30 3 60 r29 3 .6k r28 3 6k r27 360k r31 100k r4 5 . 6k r3 56k 1 2 jp4 insulation r- r10 0 q9 stbeep y1 4 mh z 1 2 jp2 vin insulation r+ + c17 10uf + c16 10uf z r2 7 . 5v v + c18 0.1uf c28 0.1uf z r1 5 . 6v v - regulator dc 3.0v c31 5pf opt i o n r15 0 v1 - close to ic sw1 sw_ rc + c26 10uf + c27 10uf + vs - vs cl os e t o i c c30 220pf cl os e t o ic
v er. 2 . 8 12/01/12 29 es519 8 0(60 00counts) dmm analog front end with inrush 4. package information 4.1 100l l qfp outline drawing 4.2 dimension parameters

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